Volume 8

December 2017, Volume 8, Number 6

An Ultra-Low Power Robust Koggestone Adder at Sub-Threshold Voltages for Implantable Bio-Medical Devices
Sruthi Nanduru, Santosh Koppa and Eugene John, University of Texas at San Antonio, USA

VLSI Architecture for Nano Wire Based Advanced Encryption Standard (AES) with the Efficient Multiplicative Inverse

K.Sandyarani1 and P. Nirmal Kumar2, 1Sathyabama University, India and 2Anna University, India

October 2017, Volume 8, Number 5

Zigbee Transmitter for IoT Wireless Devices
A.Mounica and G.V.Subbareddy, GRIET-Hyderabad, India

August 2017, Volume 8, Number 4

Design of Quaternary Logical Circuit Using Voltage and Current Mode Logic
Shweta Hajare and Pravin Dakhole, Yeshwantrao Chavan College of Engineering, India

Simulation of FIR Filter Based on Cordic Algorithm
Shalini Rai and Rajeev Srivastava, University of Allahabad, India

Built in Self Test Architecture Using Logic Module
Sakshi Shrivastava, Sunil Malviya and Neelesh Gupta, Truba College of Science and Technology, India

June 2017, Volume 8, Number 3

Towards Temperature Insensitive Nanoscale CMOS Circuits with Adaptively Regulated Voltage Power Supplies
Ming Zhu1, Yingtao Jiang1, Mei Yang1 and Xiaohang Wang2, 1University of Nevada Las Vegas, USA and 2South China
University of Technology, China

April 2017, Volume 8, Number 2

Design of Low Power Medical Device
Wei Cai and Frank Shi, University of California, USA

February 2017, Volume 8, Number 1

A Prediction Method of Gesture Trajectory Based on Least Squares Fitting Model
Cai Mengmeng1,2, Feng Zhiquan1,2 and Luan Min1,2, 1University of Jinan, China and 2Shandong Provincial Key Laboratory of
Network-based Intelligent Computing, China

Design of Low Power SAR ADC for ECG Using 45nm CMOS Technology
Silpa Kesav1, K.S.Nayanathara1 and B.K. Madhavi2, 1CVR College of Engineering, India and 2Sridevi Women�s Engineering
College, India